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lt6557 1 6557fa 500mhz, 2200v/? gain of 2, single supply triple video ampli er with input bias control the lt ? 6557 is a high speed triple video ampli? er with an internal ? xed gain of 2 and a programmable dc input bias voltage. this ampli? er features a 400mhz 2v p-p signal bandwidth, 2200v/s slew rate and a unique ability to drive heavy output loads to 0.8v of the supply rails, mak- ing the lt6557 ideal for a single 5v supply, wideband video application. with just one resistor, the inputs of all three ampli? ers can be programmed to a common voltage level, simplifying and reducing the need for external circuitry in the ac-coupled applications. without the programmable resistor, the input bias circuit becomes inactive, allowing the use of an external clamp circuit or direct coupled input. the lt6557 has separate power supply and ground pins for each ampli? er to improve channel separation and to ease power supply bypassing. the lt6557 provides uncom- promised performance in many high speed applications where a low voltage, single supply is required. the lt6557 is available in 16-lead ssop and 5mm 3mm dfn packages. lcd video projectors rgb hd video ampli? ers coaxial cable drivers low supply adc drivers C3db small-signal bandwidth: 500mhz C3db 2v p-p large-signal bandwidth: 400mhz slew rate: 2200v/s fixed gain of 2, no external resistors required ac coupling with programmable dc input bias output swings to 0.8v of supply rails full video swing with 5v single supply diff gain: 0.02% diff phase: 0.05 enable/shutdown pin high output current: 100ma supply range: 3v to 7.5v operating temperature range: C40c to 85c available in 16-lead ssop and 5mm 3mm dfn packages ac-coupled triple video driver +? 500 ? in r gnd en in r out r v + v + r v + g v + b bcv lt6557 gnd r 75 ? 75 ? 412 ? 5v5v 5v 5v 6557 ta01a 22 f 500 ? 75 ? 220 f +? 500 ? in g in g out g gnd g 75 ? 75 ? 22 f 500 ? 75 ? 220 f +? 500 ? in b in b out b gnd b 75 ? 75 ? 22 f 500 ? 75 ? 220 f fast large-signal transient response , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. typical application features applications description downloaded from: http:///
lt6557 2 6557fa electrical characteristics total supply voltage (v s + to gnd) ...........................7.5v input current ........................................................10ma output current (note 2) .......................................70ma output short-circuit duration (note 2) ............ inde? nite operating temperature range (note 3) ... C40c to 85c speci? ed temperature range (note 4) .... C40c to 85c the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v s = 5v, r l = 150 to v s /2, v en = 0.4v, r bcv = open, unless otherwise noted. gn package 16-lead plastic ssop 12 3 4 5 6 7 8 top view 1615 14 13 12 11 10 9 en gnd in r gnd r in g gnd g in b gnd b bcvv + out rv + r out gv + g out bv + b g = +2g = +2 g = +2 t jmax = 150c, ja = 110c/w 1615 14 13 12 11 10 9 17 12 3 4 5 6 7 8 bcvv + out rv + r out gv + g out bv + b en gnd in r gnd r in g gnd g in b gnd b top view dhc package 16-lead (5mm 3mm) plastic dfn g = +2g = +2 g = +2 t jmax = 125c, ja = 40c/w exposed pad (pin 17) is gnd, must be soldered to pcb order part number gn part marking order part number dhc part marking* lt6557cgn lt6557ign 65576557i lt6557cdhc LT6557IDHC 65576557 order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/ consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grade is identi? ed by a label on the shipping container. junction temperature ssop ................................................................ 150c dfn ................................................................... 125c storage temperature range ssop ................................................. C65c to 150c dfn .................................................... C65c to 125c lead temperature (soldering, 10 sec) ssop ................................................................ 300c symbol parameter conditions min typ max units v os input offset voltage v in = 1.25v 12 15 4050 mvmv i in input current v in = 1.25v 3545 70 100 aa r in input resistance v in = 0.75v to 1.75v, bcv (pin 6) open 9050 200150 k k c in input capacitance f = 1mhz 1.5 pf absolute maximum ratings (note 1) package/order information downloaded from: http:///
lt6557 3 6557fa the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v s = 5v, r l = 150 to v s /2, v en = 0.4v, r bcv = open, unless otherwise noted. symbol parameter conditions min typ max units a v err gain error v in = 0.75v to 1.75v 0.50.5 2.53.0 %% a v match gain match between channels v in = 0.75v to 1.75v 0.40.4 2.753.25 %% v in(dc) input voltage bias r bcv = 348 1.00.8 1.251.10 1.51.7 vv psrr power supply rejection ratio v s = 4v to 6v, v in = 1.25v 4238 5047 dbdb v ol output voltage swing low 0.80.9 0.91.0 vv v oh output voltage swing high 4.14.0 4.24.1 vv i s supply current per ampli? er v en = 0.4v, r l = , includes i s of v + (pin 15) 22.525.0 2529 mama total supply current (disabled) v en = open, r l = 1010 450 1000 aa i en enable pin current v en = 0.4v C250C300 C125C150 aa i sc short-circuit current 7040 100 90 mama sr slew rate v out = 1.25v to 3.75v (note 5) 1400 2200 v/s C3db bw C3db bandwidth v out = 2v p-p 400 mhz v out = 0.2v p-p 500 mhz 0.1db bw gain flatness 0.1db bandwidth v out = 2v p-p 120 mhz fpbw full power bandwidth v out = 2v p-p (note 6) 220 350 mhz xtalk all hostile crosstalk f = 10mhz, v out = 2v p-p f = 100mhz, v out = 2v p-p C80C55 dbdb t s settling time to 1%, v out = 1.5v to 3.5v to 0.1% 47 nsns t r , t f rise time, fall time 10% to 90%, v out = 1.5v to 3.5v 875 ps g differential gain ntsc signal 0.02 % ? differential phase ntsc signal 0.05 deg hd2 2nd harmonic distortion f = 10mhz, v out = 2v p-p C68 dbc hd3 3rd harmonic distortion f = 10mhz, v out = 2v p-p C75 dbc note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: a heat sink may be required to keep the junction temperature below the absolute maximum rating.note 3: the lt6557c is guaranteed functional over the temperature range of C40c and 85c. note 4: the lt6557c is guaranteed to meet speci? ed performance from 0c to 70c. the lt6557c is designed, characterized and expected to meet speci? ed performance from C40c to 85c but is not tested or qa sampled at these temperatures.the lt6557i is guaranteed to meet speci? ed performance from C40c to 85c. note 5: slew rate is 100% production tested on the r channel and measured on the rising edge of the output signal. the slew rate of the falling edge and of the g and b channels is guaranteed through design and characterization. note 6: large-signal bandwidth is calculated from slew rate: fpbw = sr/( ? v p-p ) electrical characteristics downloaded from: http:///
lt6557 4 6557fa gain error distribution gain error matching distribution voltage gain vs temperature supply current per ampi? er vs supply voltage supply current per ampi? er vs en voltage en pin current vs en pin voltage input referred offset voltage vs temperature input bias current vs input voltage supply voltage (v) 0 supply current (ma) 30 40 50 8 6557 g04 2010 25 35 4515 50 2 1 4 3 67 5 v out = v s /2 supply current per ampi? er vs temperature typical performance characteristics downloaded from: http:///
lt6557 5 6557fa output voltage vs input voltage output voltage swing vs load current (output high) input bias voltage vs resistance at bcv pin input bias voltage vs temperature bias control voltage vs temperature frequency response of three ampli? ers gain flatness vs frequency output voltage swing vs load current (output low) frequency response typical performance characteristics downloaded from: http:///
lt6557 6 6557fa crosstalk between ampli? ers vs frequency output impedance vs frequency input impedance vs frequency psrr vs frequency distortion vs frequency distortion vs frequency typical performance characteristics frequency response with capacitive loads large-signal group delay input referred noise spectral density downloaded from: http:///
lt6557 7 6557fa overdriven output recovery enable/disable response large-signal transient response en (pin 1): enable control pin. the part is enabled when this pin is pulled low. an internal pull-up resistor of 40k will turn the part off if this pin is unconnected. gnd (pin 2): ground reference for enable pin (pin 1) and bias control voltage pin (pin 16). this pin must be connected externally to ground. in r (pin 3): red channel input. this pin has a nominal impedance of 200k with input bias circuit inactive, pin 16 open.gnd r (pin 4): ground of red channel ampli? er. this pin is not internally connected to other ground pins and must be connected externally to ground. in g (pin 5): green channel input. this pin has a nomi- nal impedance of 200k with input bias circuit inactive, pin 16 open.gnd g (pin 6): ground of green channel ampli? er. this pin is not internally connected to other ground pins and must be connected externally to ground. in b (pin 7): blue channel input. this pin has a nominal impedance of 200k with input bias circuit inactive, pin 16 open.gnd b (pin 8): ground of blue channel ampli? er. this pin is not internally connected to other ground pins and must be connected externally to ground. typical performance characteristics time (ns) 0 v in = 0.5v/div, v out = 1v/div 3 4 5 200 6557 g28 2 1 0 25 50 75 100 125 150 175 225 250 v in v out v s = 5v v in = 2.4v p-p r l = 150 time ( s) 0 0 ?1 voltage (v) 1 3 4 5 0.2 1.0 1.4 6557 g29 2 6 0.8 1.8 2.2 2.0 0.4 0.6 1.2 1.6 v en(disable) v en(enable) v out v s = 5v v out = 2v p-p ac coupledr l = 150 small-signal transient response time (ns) 0 output (v) 2.60 24 6557 g31 2.45 48 12 16 20 2 61 0 14 18 22 2.65 v s = 5v v in = 50mv p-p r l = 150 2.55 2.50 pin functions downloaded from: http:///
lt6557 8 6557fa v + b (pin 9): positive supply voltage of blue channel ampli? er. this pin is not internally connected to other supply voltage pins and must be externally connected to the supply voltage bus with proper bypassing for best performance, see power supply considerations. out b (pin 10): blue channel output. v + g (pin 11): positive supply voltage of green channel ampli? er. this pin is not internally connected to other supply voltage pins and must be externally connected to the supply voltage bus with proper bypassing for best performance, see power supply considerations. out g (pin 12): green channel output. v + r (pin 13): positive supply voltage of red channel ampli? er. this pin is not internally connected to other supply voltage pins and must be externally connected to power supply considerations the lt6557 is optimized to provide full video signal swing output when operated from a standard 5v single supply. due to the supply current involved in ultrahigh slew rate ampli? ers like the lt6557, selection of the lowest workable supply voltage is recommended to minimize heat genera- tion and simplify thermal management. temperature rise at the internal devices (t j ) must be kept below 150c (ssop package) or 125c (dfn package), and can be estimated from the ambient temperature (t a ) and power dissipation (p d ) as follows: t j = t a + p d ? 40c/w for dfn package or t j = t a + p d ? 110c/w for ssop package where p d = (i s + 0.5 ? i o ) ? v s(total) the latter equation assumes (conservatively) that the output swing is small relative to the supply and rms load current (i o ) is bidirectional (as with ac coupling). the supply voltage bus with proper bypassing for best performance, see power supply considerations. out r (pin 14): red channel output. v + (pin 15): positive supply voltage of control circuitry. this pin is not internally connected to other supply voltage pins and must be externally connected to supply voltage bus with proper bypassing for best performance, see power supply considerations. bcv (pin 16): bias control voltage. a resistor connected between pin 16 and pin 2 (gnd) will generate a dc voltage bias at the inputs of the three ampli? ers for ac coupling application, see programmable input bias. exposed pad (pin 17, dfn package): ground. this pad must be soldered to pcb and is internally connected to gnd (pin 2). the grounds are separately pinned for each ampli? er to minimize crosstalk. operation from split supplies can be accomplished by connecting the lt6557 ground pins to the negative rail. since the ampli? er gain is referenced to its ground pins, the actual signals are referenced to the negative rail, in this case, and dc coupled applications need to take this into consideration. with dual supplies, recommended voltages range from nominal 2.5v to 3.3v. the ultrahigh frequency (uhf) operating range of the lt6557 requires that careful printed circuit layout prac- tices be followed to obtain maximum performance. trace lengths between power pins and bypass capacitors should be minimized (<0.1 inch) and one or more dedicated ground planes should be employed to minimize parasitic inductance. poor layout or breadboarding methods can seriously impact ampli? er stability, frequency response and crosstalk performance. a 2.2f and a 10f bypass capacitor is recommended for the lt6557supply bus, plus a 10nf high frequency bypass capacitor at each individual power pin. pin functionsapplications information downloaded from: http:///
lt6557 9 6557fa v + in 2.5k 9.1k 6557 f01 i = v pin16 r set figure 1. simpli? ed programmable input bias circuit diagram no-signal ampli? er input bias condition according to the following relationship: v vk r bias in pin set () . = 16 91 where v pin16 = 0.048v typical. for single 5v supply operation, a 400 programming resistor is generally optimal. in applications that demand maximum ampli? er linearity, or if external biasing is preferred (in dc-coupled applications, for example), the internal biasing circuitry may be disabled by leaving pin 16 open. with pin 16 open, input loading is approximately 200k . shutdown control the lt6557 may be placed into a shutdown mode, where all three ampli? er sections are deactivated and power sup- ply draw is reduced to approximately 10a. when the en pin is left open, an internal 40k pull-up resistor brings the pin to v + and the part enters the shutdown mode. pulling the pin more than approximately 1.5v below v + will en- able the lt6557 (see figure 2 for equivalent circuit). the pull-down current required to activate the part is typically 125a. in most applications, the en pin is simply con- nected to ground (for continuous operation) or driven directly by a cmos-level logic gate (see figure 3 for examples). response time is typically 50ns for enabling, and 1s for shutdown. in shutdown mode, the feedback resistors remain connected between the output pins and the individual ground (or v C connected) pins. v + 40k bias circuitry en figure 2. simpli? ed shutdown circuit diagram lt6557 v + v + 2 (3a) open drain or open collector 1 en disable lt6557 2 6557 f03 (3b) cmos gate with shared supply 1 en disable figure 3. suitable shutdown pin drive circuits programmable input bias the lt6557 contains circuitry that provides a user-pro- grammed bias voltage to the inputs of all three ampli? er sections. the internal biasing feature is designed to mini-mize external component count in ac-coupled applica- tions, but may be defeated if external biasing is desired. figure 1 shows the simpli? ed equivalent circuit feeding the noninverting input of each ampli? er. a programming resistor from pin 16 to gnd (pin 2) establishes the nominal applications information downloaded from: http:///
lt6557 10 6557fa gn package 16-lead plastic ssop (narrow .150 inch) (reference ltc dwg # 05-08-1641) gn16 (ssop) 0204 12 3 4 5 6 7 8 .229 ? .244 (5.817 ? 6.198) .150 ? .157** (3.810 ? 3.988) 16 15 14 13 .189 ? .196* (4.801 ? 4.978) 12 11 10 9 .016 ? .050 (0.406 ? 1.270) .015 .004 (0.38 0.10) 45 0 ? 8 typ .007 ? .0098 (0.178 ? 0.249) .0532 ? .0688 (1.35 ? 1.75) .008 ? .012 (0.203 ? 0.305) typ .004 ? .0098 (0.102 ? 0.249) .0250 (0.635) bsc .009 (0.229) ref .254 min recommended solder pad layout .150 ? .165 .0250 bsc .0165 .0015 .045 .005 *dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side **dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side inches (millimeters) note:1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale bias v + en in out 6557 ss 500 ? 500 ? simplified schematic package description downloaded from: http:///
lt6557 11 6557fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. dhc package 16-lead plastic dfn (5mm 3mm) (reference ltc dwg # 05-08-1706) 3.00 0.10 (2 sides) 5.00 0.10 (2 sides) note:1. drawing proposed to be made variation of version (wjed-1) in jedec package outline mo-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.20 typ 4.40 0.10 (2 sides) 1 8 16 9 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dhc16) dfn 1103 0.25 0.05 pin 1notch 0.50 bsc 4.40 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.20 0.05 0.50 bsc 0.65 0.05 3.50 0.05 packageoutline 0.25 0.05 package description downloaded from: http:///
lt6557 12 6557fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2006 lt/lwi 0606 ? rev a ? printed in usa split supply operation with dc bias servo typical application related parts part number description comments lt1399 300mhz triple current feedback ampli? er 0.1db gain flatness to 150mhz, shutdown lt1675 250mhz triple rgb multiplexer 100mhz pixel switching, 1100v/s slew rate, 16-lead ssop lt6550/lt6551 3.3v triple and quad video buffers 110mhz gain of 2 buffers in ms package lt6553 650mhz gain of 2 triple video ampli? er optimized for driving 75 cables lt6554 650mhz gain of 1 triple video ampli? er performance similar to the lt6553 with a v = 1, 16-lead ssop lt6555 650mhz gain of 2 triple video multiplexer optimized for driving 75 cables lt6556 750mhz gain of 1 triple video multiplexer high slew rate 2100v/s lt6558 550mhz, 2200v/s gain of 1 triple video ampli? er single supply with input bias control downloaded from: http:///

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